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The 14th International System-on-Chip (SoC)

Conference, Exhibit & Workshops

 October 19 & 20, 2016

University of California, Irvine (UCI) - Calit2

13th International SoC Conference In Pictures. . .


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8th International System-on-Chip (SoC)

Conference, Exhibit & Workshops


November 3 & 4, 2010 Hilton Irvine/Orange County Airport, Southern California


The Most Informative & Targeted

SoC, ASIC, FPGA, ASSP, and Foundry Technology Conference & Exhibit of the Year


Don't Miss Out!


If you have any questions or need more information, please contact:  SoC@SavantCompany.com or 949-851-1714,  Thank you!




Workshop # 1




JRI Technology

Digital TV on a Chip – An Overview 

By Dr. Jordan Isailovic, President, JRI Technology. Savant Affiliate. 

DTV’s rapid growth in popularity is spurred by the high-definition video quality as well as the availability of a variety of new features and services including video on demand (VoD), gaming, security, PVR, interactive TV, merchandising and Web browser capabilities. In this half-day Workshop, an overview of Digital TV technology and its system-level block diagram will be provided and main blocks will be discussed. Dr. Jordan Isailovic, will covers the video chain from the initial capture of video content to the final viewing experience. Applicable compression technologies such as MPEG will be reviewed. Topics that will be reviewed, include:

  • Digital Television architecture and functionality


  • System Interfaces

  • Major video processing building blocks

  • Strategic consideration for the design of digital TV system-on-chip
    Trade-off between performance and cost.

  • Multi-format picture decoding in support of high definition AVC, H.264, VC-1, AVS and MPEG-2 streams.

  • Aspect ratio conversions; AFD, closed captions 608/708

  • Synchronization in the MPEG world; Lip-sync and latency issues
    Conditional access, authorization and control

  • Major trends and Future A/V Standards, H.265, etc.

  • Looking beyond HD: 3D, Hi-vision, mobile TV, etc.

Who Should Attend:
Engineers, technical management, system architects, technology analysts, systems developers and integrators, etc., who are interested in getting a comprehensive overview of the Digital TV technology and its single chip opportunity would greatly benefit from this half-day informative workshop.

Instructor: Dr. Jordan Isailovic is a Professor of Electrical Engineering at California State University. He is the author of Videodisc and Optical Memory Technologies and Videodisc Systems: Theory and Applications. He has authored numerous technical articles and holds several patents on digital information storage techniques and video signal processing. He presented the world's first public engineering course on videodisc technology (January 1982) and taught the world's first graduate courses on videodisc and optical memories (CD, CD-ROM, etc.). For more details about Dr. Isailovic see: www.jritechnology.com/Instructor.pdf.



Date, Time & Location

 Nov 4, 2009. TBA.



Register for this Workshop

Early Bird Price is only $49!

To register for this workshop, please contact: SoC@SavantCompany.com








Workshop # 2




Understanding and Effectively Suppressing the Noise Coupling in Mixed-Signal SoC Applications.  By: Dr. Cosmin Iorga.

The understanding of noise coupling phenomena is essential to semiconductor design engineers who must deal with the challenges of integrating more and more functionality on a single chip. This tutorial provides a practical approach to the analysis of noise coupling mechanisms at device, chip substrate, package, and PCB levels, the implementation of efficient suppression techniques, and the simulation of noise coupling in various stages of the design flow. I addition to conventional suppression and simulation techniques, circuit level noise cancellation methodologies and practical procedures for modeling the noise coupling early in the architectural stages of the design are also presented.


For workshop description, please visit:  Noise Coupling

Instructor:  Dr. Cosmin Iorga has earned his Ph.D. in Electrical Engineering form Stanford University. His research work and dissertation focused on the analysis, modeling, and suppression of noise coupling in integrated circuits. Dr. Cosmin Iorga has accumulated more than 15 years of experience in high-speed circuit design and troubleshooting at system, board, and integrated circuit levels, with emphasis on signal integrity and noise coupling reduction. Dr. Cosmin Iorga has filed more than 10 patents with 6 granted so far, covering innovative solutions in noise coupling reduction and signal integrity. Dr. Cosmin Iorga is the author of the book "Noise Coupling in Integrated Circuits: A Practical Approach to Analysis, Modeling, and Suppression". Dr. Cosmin Iorga is founder and president of NoiseCoupling.com, a company that focuses on research of noise coupling in mixed-signal integrated circuits and systems-on-chip, and noise coupling education through technical seminars and hands-on workshops.



Date, Time & Location

To register for this workshop, please contact: SoC@SavantCompany.com








Workshop # 3




Innovative Business Approaches in Chip Design, Hardware Design, Software development, etc. 

By Jauher Zaidi, President & CEO, PalmChip 







Date, Time & Location

To register for this workshop, please contact: SoC@SavantCompany.com









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